DocumentCode
2229424
Title
On the graceful degradation of phase-locked clocks
Author
Krishna, C.M. ; Bhandari, I.S.
Author_Institution
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
fYear
1988
fDate
6-8 Dec 1988
Firstpage
202
Lastpage
211
Abstract
The use of phase-locked clocks to limit clock skews to fractions of the clock period while keeping the algorithm overhead very small is investigated. The number of clocks in the system required to ensure that up to m arbitrary failures can be tolerated with all the good clocks still in synchrony has been shown to be N ⩾3m +1. It is shown here that, if N ⩽3 m , it is impossible to guarantee even that a small subset of the nonfaulty clocks will always be mutually synchronized, i.e., phase-locked clocks do not necessarily degrade gracefully
Keywords
clocks; fault tolerant computing; real-time systems; arbitrary failures; clock skews; graceful degradation; phase-locked clocks; real-time systems; Aerospace electronics; Application software; Clocks; Control systems; Convergence; Degradation; Real time systems; Redundancy; Synchronization; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Real-Time Systems Symposium, 1988., Proceedings.
Conference_Location
Huntsville, AL
Print_ISBN
0-8186-4894-5
Type
conf
DOI
10.1109/REAL.1988.51116
Filename
51116
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