DocumentCode
2229464
Title
Subspace estimation by hierarchical neural PCA: analog/digital implementation constraints
Author
Paraschiv-Ionescu, Ani ; Jutten, C. ; Bouvier, G.
Author_Institution
INPGrenoble, France
Volume
3
fYear
2000
fDate
2000
Firstpage
742
Abstract
This paper addresses the issue of hardware implementation of hierarchical neural principal component analysis (PCA). We attempt to show by experimental studies the effect of finite accuracy computations on the algorithm´s performance, for both analog and digital implementation
Keywords
array signal processing; eigenvalues and eigenfunctions; learning (artificial intelligence); neural nets; principal component analysis; analog/digital implementation constraints; finite accuracy computations; hardware implementation; hierarchical neural PCA; principal component analysis; subspace estimation; Algorithm design and analysis; Eigenvalues and eigenfunctions; Electronics packaging; Hardware; Neural networks; Physics computing; Principal component analysis; Sensor arrays; Signal processing algorithms; Subspace constraints;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location
Geneva
Print_ISBN
0-7803-5482-6
Type
conf
DOI
10.1109/ISCAS.2000.856167
Filename
856167
Link To Document