An auto-sensitivity control circuit for DS-CDMA receiver circuit

We had proposed a novel DS-CDMA bus inte$ace for parallel computing system. The receiver circuit in DS-CDMA bus inte$ace requires different sensitivities for different number of TransmitterlReceiver pairs. These changes make errors in the receiving data. We proposed circuit that controls the effect of using different numbers of Transmitter/Receiver pairs. Simulation results verified that with the auto-sensitivity control circuit, receiver circuit in DS-CDMA bus inte$ace works well for range of 5 to 30 pairs of Transmitter/Receiver.