Title :
Performance limits of planar and multi-layer integrated inductors
Author :
Koutsoyannopoulos, Yorgos ; Papananos, Yannis ; Bantas, Sotiris ; Alemanni, Carlo
Author_Institution :
Microelectron. Circuit Design Group, Nat. Tech. Univ. of Athens, Greece
Abstract :
The performance of integrated inductors is quantified, with respect to geometrical parameters and silicon process characteristics. A custom EDA tool is employed for modeling and simulating an assortment of inductor topologies under various process schemes. The aim is to outline inductor performance limits, mainly in terms of inductance, quality factor and resonant frequency. Also, guidelines are provided for their optimal physical design and for process enhancements that may benefit their performance in RF ICs
Keywords :
Q-factor; UHF integrated circuits; inductance; inductors; integrated circuit modelling; monolithic integrated circuits; silicon; RF ICs; RFIC; Si process characteristics; custom EDA tool; geometrical parameters; inductance; inductor topologies; modeling; multi-layer integrated inductors; optimal physical design; performance limits; planar integrated inductors; process enhancements; quality factor; resonant frequency; Electronic design automation and methodology; Guidelines; Inductance; Inductors; Process design; Q factor; Radio frequency; Resonant frequency; Silicon; Topology;
Conference_Titel :
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location :
Geneva
Print_ISBN :
0-7803-5482-6
DOI :
10.1109/ISCAS.2000.856283
