De-synchronization: asynchronous circuits from synchronous specifications

This paper presents an EDA methodology that can be used to realize asynchronous circuits using conventional EDA tools and conventional technology libraries, starting from a synchronous synthesizable specification. It provides the key advantages of asynchronous implementation, i.e. low power and low EMI, at a reasonable cost in terms of area and performance, without requiring any change in the specification or in most of the flow. Only a tool that replaces the clock tree with simple asynchronous controllers is required. The controllers are implemented using the direct-mapped approach, whereas datapaths are implemented using conventional synthesis and matched delay elements. The methodology is analyzed using a case study implementing several versions of asynchronous DES encryption cores.