DocumentCode
2231163
Title
An improved algorithm-driven methodology to optimize switched current memory cells by transistor sizing
Author
Fakhfakh, M. ; Loulou, M. ; Masmoudi, N.
Author_Institution
National Engineering School of Sfax
fYear
2004
fDate
5-7 Sept. 2004
Firstpage
686
Lastpage
689
Keywords
Algorithm design and analysis; CMOS process; Capacitance; Circuits; Design automation; Design methodology; Design optimization; Optimization methods; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical, Electronic and Computer Engineering, 2004. ICEEC '04. 2004 International Conference on
Print_ISBN
0-7803-8575-6
Type
conf
DOI
10.1109/ICEEC.2004.1374569
Filename
1374569
Link To Document