Title :
An embedded FeRAM macro cell for a smart card microcontroller
Author :
Miwa, Tohru ; Yamada, Junichi ; Okamoto, Yuji ; Koike, Hiroki ; Toyoshima, Hideo ; Hada, Hiromitsu ; Hayashi, Yoshihiro ; Okizaki, Hiroaki ; Miyasaka, Yuto ; Kunio, Takemitsu ; Miyamoto, Hidenobu ; Gomi, Hideki ; Kitajima, Hiroshi
Author_Institution :
Silicon Syst. Res. Labs., NEC Corp., Sagamihara, Japan
Abstract :
This paper describes the circuit technologies and the experimental results for an embedded FeRAM macro cell for a smart card microcontroller. This macro cell employs a 256 byte 2T/2C FeRAM cell array for rewritable nonvolatile memory storage. The macro cell performs read/write operations that are fully synchronous with the microprocessor core, and its write operations are over 1000 times faster than the program operations of a conventional EEPROM macro cell. The macro cell is provided with developed offset sense amplifiers for screening out any weak cells in write endurance. With a small memory cell, as well as a small charge pumping circuit and write circuits, the FeRAM macro cell occupies only half the area of an EEPROM macro. A prototype microcontroller provided with the FeRAM macro cell is fabricated in a standard double metal layer CMOS process with added ferroelectric capacitor process steps
Keywords :
CMOS digital integrated circuits; ferroelectric storage; integrated circuit design; microcontrollers; random-access storage; smart cards; 256 byte; FeRAM cell array; double metal layer CMOS process; embedded FeRAM macro cell; ferroelectric capacitor process steps; offset sense amplifiers; read/write operations; rewritable nonvolatile memory storage; smart card microcontroller; Charge pumps; Circuits; EPROM; Ferroelectric films; Microcontrollers; Microprocessors; Nonvolatile memory; Prototypes; Random access memory; Smart cards;
Conference_Titel :
Custom Integrated Circuits Conference, 1998. Proceedings of the IEEE 1998
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-4292-5
DOI :
10.1109/CICC.1998.695014
