Title :
Performance analysis and architecture evaluation of MPEG-4 video codec system
Author :
Chang, Hao-Chieh ; Chen, Liang-Gee ; Hsu, Mei-Yun ; Chang, Yung-Chi
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
This paper presents various analyses of computational behavior. Namely, the number of datapath operations and memory access on the core profile level 2 (CPL2) of MPEG-4 video standard. These analyzed data exploit the load distribution and mode selection of the video system. The exploration of data-flow behavior and its derived computation of MPEG-4 video processing algorithms will then drive through an efficient architecture design
Keywords :
code standards; data flow computing; telecommunication standards; video codecs; MPEG-4; architecture evaluation; computational behavior; core profile level 2; data-flow behavior; datapath operations; derived computation; load distribution; memory access; mode selection; video codec system; video processing algorithms; Arithmetic; Computer aided engineering; Decoding; Discrete cosine transforms; MPEG 4 Standard; Motion estimation; Performance analysis; Quantization; Shape; Video codecs;
Conference_Titel :
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location :
Geneva
Print_ISBN :
0-7803-5482-6
DOI :
10.1109/ISCAS.2000.856361
