An efficient implementation of the InfiniBand link layer

InfiniBand is a new system interconnection protocol that provides high bandwidth, expandability, and scalability. This paper presents the design and implementation of the link layer of an InfiniBand HCA (host channel adapter). Six VLs (virtual lanes), three for transmit and three for receive, are employed to communicate data between the transport layer and the link layer. For the efficient implementation of the receiver logic, a high-speed packet buffering architecture with a novel FIFO circuit is proposed. The new architecture enables the efficient utilization of the InfiniBand bandwidth and the reduction of hardware cost as well as power consumption. The implemented link layer core is employed by an InfiniBand HCA chip called KINCA that complies with InfiniBand protocol v1.0a and is fabricated with the UMC 0.18 μm process.