DocumentCode
2232920
Title
Identifying translinear loops in the circuit topology
Author
Vargas-Bernal, Rafael ; Sarmiento-Reyes, Arturo ; Serdijn, Wouter A.
Author_Institution
INAOE, Puebla, Mexico
Volume
2
fYear
2000
fDate
2000
Firstpage
585
Abstract
This paper presents a topological method for identifying multiple static translinear loops using a graphical representation. It is found that the translinear principle has a new formulation based on graph theory concepts and it is applied to circuits containing BJTs and MOS transistors. In addition, it introduces the concept of translinear circuit for representing a translinear loop. The types of interaction between translinear loops are studied and its properties are established. The method is illustrated with a generic example
Keywords
MOSFET circuits; bipolar transistor circuits; graph theory; network topology; nonlinear network analysis; BJTs; MOS transistors; circuit topology; graphical representation; multiple static translinear loops; translinear circuit; Bipolar transistors; Circuit analysis; Circuit synthesis; Circuit topology; Contracts; Graph theory; Graphical models; MOSFETs; Scholarships; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location
Geneva
Print_ISBN
0-7803-5482-6
Type
conf
DOI
10.1109/ISCAS.2000.856396
Filename
856396
Link To Document