The direct skew detect synchronous mirror delay (Direct SMD) for ASICs

Author

Saeki, E. Anori ; Minami, Koichiro ; Yoshida, Hiroshi ; Suzuki, Hisamitsu

Author_Institution

ULSI Device Dev. Labs., NEC Corp., Kanagawa, Japan

fYear

1998

fDate

11-14 May 1998

Firstpage

511

Lastpage

514

Abstract

This paper describes a new concept nonfeedback CMOS digital clock generator, Direct SMD, that achieves clock deskew in only two clock cycles for ASICs having unfixed and various clock paths. The Direct SMD detects clock skew as well as clock cycle by introducing direct skew detector and clock suspension circuitry. The direct skew detection scheme completely removes the phase error caused by the delay fluctuation of the clock driver. The measured results demonstrate that the Direct SMD can successfully eliminate various amounts of clock skew (2.0 ns-3.0 ns) at 200 MHz in two clock cycles

Keywords

application specific integrated circuits; clocks; delay circuits; pulse generators; 2.0 to 3.0 ns; 200 MHz; ASICs; Direct SMD; clock deskew; clock paths; clock suspension circuitry; delay fluctuation; direct skew detect synchronous mirror delay; nonfeedback CMOS digital clock generator; phase error; Application specific integrated circuits; Clocks; Delay effects; Delay lines; Driver circuits; Mirrors; Phase locked loops; Propagation delay; Synchronization; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1998. Proceedings of the IEEE 1998

Conference_Location

Santa Clara, CA

Print_ISBN

0-7803-4292-5

Type

conf

DOI

10.1109/CICC.1998.695030

Filename

695030