Performance and reliability of asymmetric LDD devices and logic gates

Author

Chen, Jone F. ; Tao, Jiang ; Fang, Peng ; Hu, Chenming

Author_Institution

California Univ., Berkeley, CA, USA

fYear

1998

fDate

11-14 May 1998

Firstpage

533

Lastpage

536

Abstract

The performance and reliability of NMOSFET asymmetric LDD devices (with no LDD on the source side) are compared with that of conventional LDD devices. Asymmetric LDD devices exhibit higher I_dsat and larger I_sub. To maintain the same hot-carrier lifetime, asymmetric LDD devices must operate at lower V_dd. For the same hot-carrier lifetime, ring oscillators with NMOSFET asymmetric LDD devices can achieve 5% (10% if PMOSFET also had asymmetric LDD) higher speed and 10% lower power. The hot-carrier reliability of inverter, NAND, and NOR structures with asymmetric LDD devices are also simulated and compared

Keywords

CMOS logic circuits; MOSFET; hot carriers; integrated circuit reliability; logic gates; semiconductor device reliability; NAND structures; NMOSFET; NOR structures; PMOSFET; asymmetric LDD devices; hot-carrier lifetime; inverter structures; logic gates; reliability; ring oscillators; Degradation; Delay; Hot carriers; Inverters; Logic devices; Logic gates; MOS devices; MOSFET circuits; Maintenance; Ring oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1998. Proceedings of the IEEE 1998

Conference_Location

Santa Clara, CA

Print_ISBN

0-7803-4292-5

Type

conf

DOI

10.1109/CICC.1998.695034

Filename

695034