DocumentCode :
2233411
Title :
Design considerations and tools for low-voltage digital system design
Author :
Chandrakasan, Anantha ; Yang, Isabel ; Viori, C. ; Antoniadis, Dimitri
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA
fYear :
1996
fDate :
3-7 Jun, 1996
Firstpage :
113
Lastpage :
118
Abstract :
Aggressive voltage scaling to 1 V and below through technology, circuit, and architecture optimization has been proven to be the key to ultra low-power design. The key technology trends for low-voltage operation are presented including low-threshold devices, multiple-threshold devices, and SOI and bulk-CMOS based variable threshold devices. The requirements on CAD tools that allow designers to choose and optimize various technology, circuit, and system parameters are also discussed
Keywords :
integrated logic circuits; logic CAD; power consumption; CAD tools; SOI; bulk-CMOS; low-power design; low-threshold devices; low-voltage digital system design; multiple-threshold devices; Capacitance; Design automation; Design optimization; Digital systems; Permission; Power dissipation; Signal design; Statistics; Switching circuits; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference Proceedings 1996, 33rd
Conference_Location :
Las Vegas, NV
ISSN :
0738-100X
Print_ISBN :
0-7803-3294-6
Type :
conf
DOI :
10.1109/DAC.1996.545556
Filename :
545556
Link To Document :
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