Title :
A novel logarithmic response CMOS image sensor with high output voltage swing and in-pixel fixed pattern noise reduction
Author :
Lai, Liang-Wei ; King, Ya-Chin
Author_Institution :
Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Abstract :
A novel logarithmic response 0.25 μm CMOS image sensor technology for high output swing and low noise error is proposed. The experimental results show that the new cell has 4 times higher output voltage swing. Optimized simulation results show 6.5 times larger output voltage swing, which is achievable for an input signal range of 0.01 lux to 100,000 lux. With this wider swing, the effect of fixed pattern noise (FPN) reflecting on the digital output can be reduced significantly. In addition, after adding a correlated double sampling (CDS) control transistor, the output voltage difference variation due to FPN is greatly reduced from 73 mV to 15 mV.
Keywords :
CMOS image sensors; circuit simulation; correlation methods; integrated circuit measurement; integrated circuit modelling; integrated circuit noise; signal sampling; 0.25 micron; CDS control transistor; correlated double sampling control transistor; digital output; fixed pattern noise; in-pixel fixed pattern noise reduction; input signal range; lateral PNP; logarithmic response CMOS image sensor; noise error; optimized simulation; output voltage difference variation; output voltage swing; CMOS image sensors; CMOS process; Circuits; Dynamic range; Image sensors; Lighting; Noise reduction; Photoconductivity; Pixel; Voltage;
Conference_Titel :
ASIC, 2002. Proceedings. 2002 IEEE Asia-Pacific Conference on
Print_ISBN :
0-7803-7363-4
DOI :
10.1109/APASIC.2002.1031543
