DocumentCode
2233645
Title
Design of negative charge pump circuit with polysilicon diodes in a 0.25 μm CMOS process
Author
Ker, Ming-Dou ; Chang, Chyh-Yih ; Jiang, Hsin-Chin
Author_Institution
Integrated Circuits & Syst. Lab., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fYear
2002
fDate
2002
Firstpage
145
Lastpage
148
Abstract
A charge pump circuit realized with the substrate-isolated polysilicon diode in the 0.25 μm CMOS process is proposed. With the polysilicon diode, the stable negative voltage generation can be realized in general sub-quarter-micron CMOS process without extra process modification or additional mask layer. The device characteristic of polysilicon diode and the voltage waveforms of the negative charge pump circuit have been successfully verified in a 0.25 μm CMOS process with grounded p-type substrate.
Keywords
CMOS analogue integrated circuits; VLSI; integrated circuit design; low-power electronics; 0.25 micron; CMOS; Si; grounded p-type substrate; low-voltage operation; negative charge pump circuit; stable negative voltage generation; substrate-isolated polysilicon diode; voltage waveforms; CMOS integrated circuits; CMOS process; CMOS technology; Charge pumps; Diodes; Doping; Integrated circuit technology; Isolation technology; P-n junctions; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2002. Proceedings. 2002 IEEE Asia-Pacific Conference on
Print_ISBN
0-7803-7363-4
Type
conf
DOI
10.1109/APASIC.2002.1031553
Filename
1031553
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