On the hardware design for DES cipher in tamper resistant devices against differential fault analysis

In the past 20 years, DES has been the most widely used symmetric block cipher for information security. Recently, a novel method called Differential Fault Analysis (DFA) has been proposed to attack DES. Under the assumption that the attacker can induce errors into the cipher device, the key of DES can be unveiled easily. The assumed technique is not mature today, but is like to appear in the near future, especially for attacking a tamper resistant device with an embedded DES VLSI chip. In this paper, we proposed a new hardware design for the DES cipher to resist DFA. By adding some protection circuitry, all the unidirectional faults induced into the registers of a DES chip can be detected, and then alter to the cryptosystem immediately. A hardware emulation experiment using Altera´s CPLD chip shows the effectiveness of the protection design