Title :
A V-driver circuit for lowering power of sub-0.1μm bus
Author :
Yamashita, Takahiro ; Arima, Yukio ; Ishibashi, Koichiro
Author_Institution :
Semicond. Technol. Acad. Res. Center, Yokohama, Japan
Abstract :
A bus driver circuit which reduces the power dissipation of interconnects is described. The proposed V-driver prevents simultaneous signal transitions of opposite direction. Simulated results show up to 42.2% power reduction for 65 nm CMOS technology. A test chip was fabricated and measured. The results show a 10.7% power reduction at 100 MHz, 1.0 V operation.
Keywords :
CMOS digital integrated circuits; circuit CAD; circuit simulation; crosstalk; driver circuits; integrated circuit design; integrated circuit interconnections; integrated circuit measurement; integrated circuit modelling; integrated circuit noise; nanoelectronics; system buses; 1.0 V; 100 MHz; 65 nm; CMOS bus power reduction; CMOS process; V bus driver circuits; V-driver circuits; crosstalk; interconnect power dissipation reduction; operating frequency/voltage; opposite direction simultaneous signal transitions; Capacitance; Circuit simulation; Delay; Driver circuits; Inverters; Mirrors; Recycling; Shape; Timing; Wire;
Conference_Titel :
ASIC, 2002. Proceedings. 2002 IEEE Asia-Pacific Conference on
Print_ISBN :
0-7803-7363-4
DOI :
10.1109/APASIC.2002.1031583
