Title :
Smart Core System for Dependable Many-Core Processor with Multifunction Routers
Author :
Takamaeda, Shinya ; Sato, Shimpei ; Miyoshi, Takefumi ; Kise, Kenji
Author_Institution :
Grad. Sch. of Inf. Sci. & Eng., Tokyo Inst. of Technol., Tokyo, Japan
Abstract :
Dependability of many-core processors is a very important topic. To improve the dependability, we propose the Smart Core system, which is a smart many-core system with redundant cores and multifunction routers. The multifunction router has three functions: copying packets, changing the destinations of packets, and rendezvousing and comparing two packets from different nodes. Using these additional functions, the Smart Core system realizes redundant execution on multiple cores and detects execution errors at the packet level. We implemented a many-core processor with the Smart Core system on a software simulator. The evaluation result shows that the performance overhead of packet rendezvous is small, up to 4.1%. In addition, we verified that a dependable many-core processor with the Smart Core system detects execution errors on a hardware prototyping system.
Keywords :
microprocessor chips; multiprocessing systems; network routing; redundancy; SmartCore system; dependable many-core processor; execution error detection; hardware prototyping system; multifunction router; packet copying; redundant core; redundant execution; software simulator; Dependability; FPGA-prototyping; Many-core processor; Network on Chip;
Conference_Titel :
Networking and Computing (ICNC), 2010 First International Conference on
Conference_Location :
Higashi-Hiroshima
Print_ISBN :
978-1-4244-8918-3
Electronic_ISBN :
978-0-7695-4277-5
DOI :
10.1109/IC-NC.2010.53
