Title :
Symphony: a simulation backplane for parallel mixed-mode co-simulation of VLSI systems
Author :
Todesco, Antonio R W ; Meng, Teresa H Y
Author_Institution :
Comput. Syst. Lab., Stanford Univ., CA, USA
Abstract :
In this paper we present an integrated simulation paradigm in which parallel mixed-mode co-simulation is accomplished by integrating sequential simulators in a software simulation backplane. Distributed conservative event-driven scheduling is used in combination with an efficient deadlock-free mechanism for handling synchronous feedback circuits. Simulation concurrency can be further increased by utilizing circuit pipeline. The resulting parallel simulation backplane is capable of concurrently simulating systems at circuit, switch, gate, RTL and behavioral levels. We implemented this parallel mixed-mode simulator on both the iPSC/860 message-passing machine and the DASH shared-memory multiprocessor. Experimental results are presented
Keywords :
circuit analysis computing; logic CAD; parallel programming; DASH; Symphony; VLSI systems; concurrency; deadlock-free mechanism; event-driven scheduling; iPSC/860; message-passing machine; mixed-mode co-simulation; parallel mixed-mode simulator; parallel simulation; sequential simulators; shared-memory multiprocessor; simulation backplane; software simulation backplane; Backplanes; Circuit simulation; Computational modeling; Computer simulation; Concurrent computing; Feedback circuits; Permission; Switches; System recovery; Very large scale integration;
Conference_Titel :
Design Automation Conference Proceedings 1996, 33rd
Conference_Location :
Las Vegas, NV
Print_ISBN :
0-7803-3294-6
DOI :
10.1109/DAC.1996.545562
