DocumentCode :
2235256
Title :
Self-checking FSM design with observing only FSM outputs
Author :
Matrosova, A. ; Ostanin, S.
Author_Institution :
Tomsk State Univ., Russia
fYear :
2000
fDate :
2000
Firstpage :
153
Lastpage :
154
Abstract :
We deal with the problem of a self-checking FSM design with observing only FSM outputs. We suggest a special PLA description of the FSM behavior that is well suited in practice. It is established that a factorized multilevel synthesis method applied to this PLA description and followed by the gate implementation provides observing only FSM outputs. We assume that a set of faults considered does not demand introducing additional FSA input lines. We also propose a mathematical tool that makes possible for any synthesis method applied to this special PLA description to clarify the possibility of observing only FSM outputs
Keywords :
finite state machines; logic design; logic testing; programmable logic arrays; PLA description; factorized multilevel synthesis method; gate implementation; mathematical tool; observing only FSM outputs; self-checking FSM design; Programmable logic arrays;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
On-Line Testing Workshop, 2000. Proceedings. 6th IEEE International
Conference_Location :
Palma de Mallorca
Print_ISBN :
0-7695-0646-1
Type :
conf
DOI :
10.1109/OLT.2000.856629
Filename :
856629
Link To Document :
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