DocumentCode :
2235400
Title :
Understanding Tradeoffs in Software Transactional Memory
Author :
Dice, Dave ; Shavit, Nir
fYear :
2007
fDate :
11-14 March 2007
Firstpage :
21
Lastpage :
33
Abstract :
There has been a flurry of recent work on the design of high performance software and hybrid hardware/software transactional memories (STMs and HyTMs). This paper re-examines the design decisions behind several of these state-of-the-art algorithms, adopting some ideas, rejecting others, all in an attempt to make STMs faster. We created the transactional locking (TL) framework of STM algorithms and used it to conduct a range of comparisons of the performance of non-blocking, lock-based, and Hybrid STM algorithms versus fine-grained hand-crafted ones. We were able to make several illuminating observations regarding lock acquisition order, the interaction of STMs with memory management schemes, and the role of overheads and abort rates in STM performance
Keywords :
storage management; hybrid hardware-software transactional memories; lock acquisition; memory management; software transactional memory; transactional locking; Algorithm design and analysis; Data structures; Hardware; Large-scale systems; Memory management; Programming profession; Software performance; Sun; System recovery; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Code Generation and Optimization, 2007. CGO '07. International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
0-7695-2764-7
Type :
conf
DOI :
10.1109/CGO.2007.38
Filename :
4145102
Link To Document :
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