Title :
A family of self-repair SRAM cores
Author :
Benso, Alfredo ; Chiusano, Silvia ; Di Natale, G. ; Prinetto, Paolo ; Bodoni, Monica Lobetti
Author_Institution :
Dipt. di Autom. e Inf., Politecnico di Torino, Italy
Abstract :
In the present paper a family of BISR SRAM cores is proposed, characterized by a self-repair strategy performed on-line and without user intervention. Moreover, w.r.t. the BISR approaches presented so far, the proposed method is independent from the memory physical layout. In addition to the BISR architecture, to detect the faulty cells to be repaired, a complete set of test solutions is proposed ranging from an external test to an on-line concurrent BIST
Keywords :
SRAM chips; automatic testing; built-in self test; cellular arrays; integrated circuit testing; memory architecture; BISR; faulty cells; on-line concurrent BIST; self-repair SRAM cores; self-repair strategy; test solutions; Automatic testing; Built-in self-test; Circuit faults; Physics; Random access memory; Read only memory; Read-write memory; Reduced instruction set computing; Space missions; World Wide Web;
Conference_Titel :
On-Line Testing Workshop, 2000. Proceedings. 6th IEEE International
Conference_Location :
Palma de Mallorca
Print_ISBN :
0-7695-0646-1
DOI :
10.1109/OLT.2000.856639
