• DocumentCode
    2235644
  • Title

    Design and analysis of a scalable terabit multicast packet switch with dual round robin dynamic link reservation

  • Author

    Chen, Feihong ; Uzun, Necdet ; Akansu, Ali N.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., New Jersey Inst. of Technol., Newark, NJ, USA
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    73
  • Lastpage
    82
  • Abstract
    We present a novel switch design of a large scale multicast packet switch which is features a modular switch architecture and a distributed resource allocation algorithm. The switch inputs and outputs are grouped into small modules called input shared blocks (ISBs) and output shared blocks (OSBs). Input link sharing and output link sharing are cooperated intelligently so that no speedup is necessary in the central switch fabric (ATMCSF). Cell delivery is based on link reservation in every ISB. We propose a dual round robin dynamic link reservation (DRRDLR) algorithm to achieve a fast and fair link resource allocation among ISBs. DRRDLR is a distributed algorithm in a way that an ISB can dynamically increase/decrease its link reservation for a specific OSB according to its local available information. The arbitration complexity is O(1). The switch performance is evaluated through simulations for an 256×256 switch. It is demonstrated that the proposed switch can achieve a comparable performance to the output queued switch under any traffic pattern. Moreover, our switch design eliminates the N times speedup needed in the OQ switch
  • Keywords
    asynchronous transfer mode; computational complexity; distributed algorithms; multicast communication; packet switching; queueing theory; telecommunication traffic; ATM central switch fabric; DRRDLR algorithm; arbitration complexity; cell delivery; distributed algorithm; distributed resource allocation algorithm; dual round robin dynamic link reservation; fair link resource allocation; grouped virtual output queue; input link sharing; input shared blocks; large scale multicast packet switch; modular switch architecture; output link sharing; output queued switch; output shared blocks; packet switch analysis; packet switch design; scalable terabit multicast packet switch; simulations; switch inputs; switch outputs; switch performance; traffic pattern; Algorithm design and analysis; Distributed algorithms; Fabrics; Large-scale systems; Multicast algorithms; Packet switching; Resource management; Round robin; Switches; Traffic control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Switching and Routing, 2000. ATM 2000. Proceedings of the IEEE Conference on
  • Conference_Location
    Heidelberg
  • Print_ISBN
    0-7803-5884-8
  • Type

    conf

  • DOI
    10.1109/HPSR.2000.856649
  • Filename
    856649