Crosstalk avoidance in RLC modeled interconnects using low power encoder

Most of encoding methods proposed in recent years has dealt with only RC modeled VLSI interconnects. With growing importance of inductive effects, it is now almost mandatory to design encoders that operates on RLC modeled VLSI interconnects. Therefore, this research work introduces an efficient bus encoder that employs Bus Inverting (BI) method to dramatically reduce crosstalk in RLC modeled interconnects. The proposed model is one of the best and proficient method for the reduction of crosstalk in interconnects. The proposed encoder consumes very less power which makes it extremely suitable for current high-speed VLSI interconnects. The proposed model demonstrates an overall reduction of 55.43% in power dissipation and 45.87% reduction in crosstalk delay for the worst case switching scenarios of 4, 8 and 16-bit lines.