DocumentCode :
2236287
Title :
SoC software components diagnosis technology
Author :
Chumachenko, Svetlana ; Gharibi, Wajeb ; Hahanova, Anna ; Sushanov, Aleksey
Author_Institution :
Comput. Eng. Fac., Kharkov Nat. Univ. of Radioelectron., Kharkov, Ukraine
fYear :
2008
fDate :
9-12 Oct. 2008
Firstpage :
155
Lastpage :
158
Abstract :
A novel approach to evaluation of hardware and software testability, represented in the form of register transfer graph, is proposed. Instances of making of software graph models for their subsequent testing and diagnosis are shown.
Keywords :
graph theory; program diagnostics; program testing; system-on-chip; SoC software components diagnosis technology; hardware testability; software graph models; software testability; Fault detection; Hardware; Registers; Ribs; Software; System-on-a-chip; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design & Test Symposium (EWDTS), 2008 East-West
Conference_Location :
Lviv
Print_ISBN :
978-1-4244-3402-2
Electronic_ISBN :
978-1-4244-3403-9
Type :
conf
DOI :
10.1109/EWDTS.2008.5580135
Filename :
5580135
Link To Document :
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