DocumentCode
2236338
Title
Hardware implementation of visible watermarking
Author
Pandurangan, Raji ; Logashanmugam, E. ; Kumar, T.V.U.Kiran
Author_Institution
Bharath University, Selaiyur, Chennai-India
fYear
2015
fDate
22-23 April 2015
Abstract
Development of Personal Computers and Cloud Computing, Internet of Things is making duplicating the data very feasible. In this paper we are proposing visible watermarking using FPGA which provides one to one compound mapping that allows reversible watermarking. This method can be applied for different types of host images like binary, opaque monochrome and translucent full color ones. The ultimate objective of the research is to develop low power, high performance, real-time, reliable and secured watermarking system which can provide robustness over certain attacks namely cover-up attack, cropping noise, scaling and geometric attacks.
Keywords
Bibliographies; Cryptography; Field programmable gate arrays; Head; Monitoring; Robustness; Watermarking; FPGA; Image watermarking; Reversible watermarking; TFT Display;
fLanguage
English
Publisher
ieee
Conference_Titel
Computation of Power, Energy Information and Commuincation (ICCPEIC), 2015 International Conference on
Conference_Location
Melmaruvathur, Chennai, India
Print_ISBN
978-1-4673-6524-6
Type
conf
DOI
10.1109/ICCPEIC.2015.7259489
Filename
7259489
Link To Document