• DocumentCode
    2236712
  • Title

    A novel timing-driven placement algorithm using smooth timing analysis

  • Author

    Ayupov, A. ; Kraginskiy, Leonid

  • fYear
    2008
  • fDate
    9-12 Oct. 2008
  • Firstpage
    137
  • Lastpage
    140
  • Abstract
    This work proposes a timing-driven placement algorithm that uses a new type of timing analysis, which we call smooth timing analysis. It constructs the timing cost function as a smooth function of cell placement. In addition, for net modeling the algorithm uses a companion net routing that provides more accurate wire delay. The placement task is then formulated as a non-linear optimization problem. Experiments prove that the proposed method is applicable to build timing-driven placement solutions for designs with thousands critical cells. Experimental results on blocks from recent microprocessor designs show a 65% average improvement in total negative slack comparing to a leading industrial flow.
  • Keywords
    circuit optimisation; integrated circuit design; integrated circuit modelling; microprocessor chips; network routing; timing; wires (electric); cell placement; companion net routing; microprocessor designs; net modeling; nonlinear optimization problem; smooth timing analysis; timing cost function; timing-driven placement algorithm; wire delay; Algorithm design and analysis; Cost function; Delay; Runtime; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design & Test Symposium (EWDTS), 2008 East-West
  • Conference_Location
    Lviv
  • Print_ISBN
    978-1-4244-3402-2
  • Electronic_ISBN
    978-1-4244-3403-9
  • Type

    conf

  • DOI
    10.1109/EWDTS.2008.5580152
  • Filename
    5580152