Abstract modelling and estimation of a high performance Tobey´s PGA

Programmable Gain Amplifiers (PGA) are the most important component in a signal chain as it poses a Signal-to-Noise performance and Total Harmonic Distortion (THD) bottleneck for any signal path. Due to it´s massive size in silicon and respective performance, parametric optimization of a PGA is of utmost importance beforehand. In this article we design a high gain (80 dB), high bandwidth (32 kHz) and a high worst case SFDR (70 dB) PGA using SystemC-AMS with all it´s real life non-idealities involved. We optimize the PGA and extract the specification for circuit level implementation. The novelty brought is manifestation of possibility of analog design optimization at highest level of abstraction.