Title :
Hardware Computation of the PageRank Eigenvector
Author :
McGettrick, Seamas ; Geraghty, Dermot
Author_Institution :
Dept. of Mech. & Manuf. Eng., Trinity Coll. Dublin, Dublin, Ireland
Abstract :
A hardware solver, implemented on an FPGA, for calculating the Page Rank eigenvector using the Power method is described. The critical operation is a very large sparse matrix by vector multiplication (SMVM). However, we show that the SMVM can be replaced with a pattern adder (a term coined to denote SMVM without multiplication), and a dense element by element vector multiplication, thus simplifying the calculation and improving performance. The system was tested for correctness and performance using a set of Internet Adjacency matrices. Performance data for Virtex 2 and Virtex 5 implementations are presented and an average performance improvement of 180% over a state of the art general purpose processor was achieved by the Virtex 5 implementation.
Keywords :
Internet; eigenvalues and eigenfunctions; matrix multiplication; reconfigurable architectures; FPGA; Internet adjacency matrix; SMVM; general purpose processor; hardware computation; pagerank eigenvector; sparse matrix by vector multiplication; Internet Adjacency Matrix; PageRank; Power Method; eigenvector;
Conference_Titel :
Reconfigurable Computing and FPGAs (ReConFig), 2010 International Conference on
Conference_Location :
Quintana Roo
Print_ISBN :
978-1-4244-9523-8
Electronic_ISBN :
978-0-7695-4314-7
DOI :
10.1109/ReConFig.2010.83