Efficient implementation and abstraction of systemc data types for fast simulation

Fast simulation is necessary to gain an efficient design flow and to meet the time-to-market constraints. Many factors impact on simulation efficiency, including the modeling language used. SystemC is a C++-based language for the modeling of embedded systems. Though being widespread, SystemC results in being much slower than other HDLs, such as VHDL and Verilog, mainly because of a slow implementation of data types. On one hand, they are necessary for modeling HW behaviors (such as high-impedance bus operations), but they decrease the overall simulation performance. Thus, this paper proposes HDTlib, a library of data types that provides an efficient implementation of bit-accurate data types, compliant with the SystemC standard. Moreover, when the level of abstraction rises from RTL and more simulation performance is required, accuracy of HW-dependent behaviors is no longer necessary. For this reason, a type abstraction methodology is proposed to get rid of low level behaviors in order to find a tradeoff between accuracy and speed. Experimental results show that HDTlib is more efficient than the OSCI SystemC standard and that the type abstraction methodology allows to gain even faster simulation.