Title :
Unfolding Method for Shabal on Virtex-5 FPGAs: Concrete Results
Author :
Francq, Julien ; Thuillet, Céline
Abstract :
Recent cryptanalysis on SHA-1 family has led the NIST to call for a public competition named SHA-3 Contest. Efficient implementations on various platforms are a criterion for ranking performance of all the candidates in this competition. It appears that most of the hardware architectures proposed for SHA-3 candidates are basic. In this paper, we focus on an optimized implementation of the Shabal candidate. We improve the state-of-the-art using the unfolding method. This transformation leads to unrolling of the Shabal core. More precisely, our design can produce a throughput over 3 Gbps on Virtex-5 FPGAs, with a reasonable area usage.
Keywords :
cryptography; field programmable gate arrays; hardware-software codesign; SHA-1 family; Shabal; Virtex-5 FPGA; cryptanalysis; hardware architectures; unfolding method; FPGA; Hardware; Hash functions; Highspeed; SHA-3 Contest; Shabal;
Conference_Titel :
Reconfigurable Computing and FPGAs (ReConFig), 2010 International Conference on
Conference_Location :
Quintana Roo
Print_ISBN :
978-1-4244-9523-8
Electronic_ISBN :
978-0-7695-4314-7
DOI :
10.1109/ReConFig.2010.46
