Evaluation of White-Box and Grey-Box Noekeon Implementations in FPGA

White-box implementations of cryptographic algorithms aim to denying the key readout even if the source code embedding the key is disclosed. They are based on sets of large tables perfectly known by the user but including unknown encoding functions. While former white-box implementations have been proposed in software, hardware white-box implementations are also possible. Their main drawback is the complexity of their architectures, which often requires large tables. In this paper we show that it is possible to implement white-box cryptography in an FPGA by taking advantages of LUTs. We also propose a grey-box approach, where intermediate random variables are unknown to the attacker. We show that such approach allows to reduce the complexity by using fewer tables. The resistance against side channel attacks has been evaluated for different implementations. Our results show the interest of the proposed methods for a better compromise complexity/security.