DocumentCode
2237402
Title
A Cost-Effective Solution to Increase System Reliability and Maintain Global Performance under Unreliable Silicon in MPSoC
Author
Hébert, Nicolas ; Almeida, Gabriel Marchesan ; Benoit, Pascal ; Sassatelli, Gilles ; Torres, Lionel
Author_Institution
STMicroelectronics, Crolles, France
fYear
2010
fDate
13-15 Dec. 2010
Firstpage
346
Lastpage
351
Abstract
The increasing failure rates observed in very deep sub micron silicon technologies pose a major problem to the design of future high-density SoCs. Emerging new architecture based on Multiprocessor SoC (MPSoC) gives the opportunity to exploit the natural redundancy with replicated spare processor in order to maintain the system performance in presence of failures. Based on the assumption that a transient loss of functionality can be tolerated, we study the feasibility and propose a cost-effective dependable hardware/software method which self-substitutes faulty processors with spare processors in a distributed manner. It guarantees the integrity, improves the availability and eases the maintainability of the MPSoC at system-level.
Keywords
integrated circuit reliability; microprocessor chips; silicon; system-on-chip; cost-effective dependable hardware-software method; multiprocessor SoC; natural redundancy; replicated spare processor; system reliability; very deep submicron silicon technologies; System-level protection; embedded MPSoC; fault-tolerant; spare processors;
fLanguage
English
Publisher
ieee
Conference_Titel
Reconfigurable Computing and FPGAs (ReConFig), 2010 International Conference on
Conference_Location
Quintana Roo
Print_ISBN
978-1-4244-9523-8
Electronic_ISBN
978-0-7695-4314-7
Type
conf
DOI
10.1109/ReConFig.2010.43
Filename
5695330
Link To Document