Title :
A high density cylinder-type MIM capacitor integrated with advanced 28nm logic High-K/Metal-Gate process for embedded DRAM
Author :
Tu, K.C. ; Wang, C.C. ; Hsieh, Y.T. ; Ting, Y.W. ; Chang, C.Y. ; Pai, C.Y. ; Tzeng, K.C. ; Chu, H.C. ; Lin, H.L. ; Chang, Y.W. ; Pen, C.N. ; Chen, K.W. ; Hsieh, T.H. ; Tsai, C.Y. ; Huang, K.C. ; Chiang, W.C. ; Wang, M.J. ; Wang, C.J. ; Tsai, C.S. ; Wuu, S
Author_Institution :
Taiwan Semicond. Manuf. Co., Ltd., Hsinchu, Taiwan
Abstract :
A cylinder-type Metal-Insulator-Metal (MIM) capacitor integrated with advanced 28nm logic High-K/Metal-Gate (HKMG) process for embedded DRAM has been developed. The stacked cell capacitor is formed using low temperature high-K dielectrics to achieve sufficient storage capacitance without significantly impacting logic transistors. This paper describes techniques to achieve cylinder-type MIM capacitor´s capacitance >;10fF/cell and keep the low leakage (<;0.1fA/cell) requirements. The MIM dielectric reliability test passes Time Dependent Dielectric Breakdown (TDDB) lifetime (>;10 years). The test vehicle is composed of 72 macros of 4.5Mb each. We successfully demonstrate fully functional good yield of 28nm eDRAM 324Mb test vehicle with access speed >;330MHz.
Keywords :
DRAM chips; MIM devices; capacitors; electric breakdown; high-k dielectric thin films; logic circuits; logic design; MIM dielectric reliability test; cylinder-type metal-insulator-metal capacitor; eDRAM; embedded DRAM; high density cylinder-type MIM capacitor; high-K/metal-gate process; logic transistors; low temperature high-K dielectrics; size 28 nm; stacked cell capacitor; storage capacitance; storage capacity 324 Mbit; storage capacity 4.5 Mbit; time dependent dielectric breakdown lifetime; Capacitance; Capacitors; Electrodes; High K dielectric materials; MIM capacitors; Random access memory; Vehicles;
Conference_Titel :
VLSI Technology, Systems, and Applications (VLSI-TSA), 2012 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4577-2083-3
DOI :
10.1109/VLSI-TSA.2012.6210164
