DocumentCode :
2239566
Title :
I´m done simulating; now what? Verification coverage analysis and correctness checking of the DECchip 21164 Alpha microprocessor
Author :
Kantrowitz, Michael ; Noack, Lisa M.
Author_Institution :
Digital Equipment Corp., Hudson, MA, USA
fYear :
1996
fDate :
3-7 Jun, 1996
Firstpage :
325
Lastpage :
330
Abstract :
Digital´s Alpha-based DECchip 21164 processor was verified extensively prior to fabrication of silicon. This simulation-based verification effort used implementation-directed, pseudorandom exercisers which were supplemented with implementation-specific, hand-generated tests. Special emphasis was placed on the tasks of checking for correct operation and functional coverage analysis. Coverage analysis shows where testing is incomplete, under the assumption that untested logic often contains bugs. Correctness checkers are various mechanisms (both during and after simulation) that monitor a test to determine if it was successful. This paper details the coverage analysis and correctness checking techniques that were used. We show how our methodology and its implementation was successful, and we discuss the reasons why this methodology allowed several minor bugs to escape detection until the first prototype systems were available. These bugs were corrected before any chips were shipped to customers
Keywords :
computer testing; integrated circuit testing; logic testing; microprocessor chips; DECchip 21164 Alpha; Digital; correctness checking; coverage analysis; microprocessor; minor bugs; pseudorandom exercisers; simulation-based verification; verification; Automatic testing; Computer bugs; Fabrication; Logic testing; Microprocessors; Monitoring; Out of order; Permission; Prototypes; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference Proceedings 1996, 33rd
Conference_Location :
Las Vegas, NV
ISSN :
0738-100X
Print_ISBN :
0-7803-3294-6
Type :
conf
DOI :
10.1109/DAC.1996.545595
Filename :
545595
Link To Document :
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