DocumentCode
2240290
Title
Design methodologies for consumer-use video signal processing LSIs
Author
Edamatsu, Hisakazu ; Ikawa, Satoshi ; Hasegawa, Katsuya
Author_Institution
Semicond. Res. Center, Matsushita Electr. Ind. Co. Ltd., Moriguchi, Japan
fYear
1996
fDate
3-7 Jun, 1996
Firstpage
497
Lastpage
502
Abstract
This paper describes the methodologies used to design a Hi-Vision MUSE decoder for Japanese HDTV and codec LSIs for digital VCRs. Since a large amount of input video data is needed to verify the algorithms and logic designs, reducing the verification time is a key issue in designing these LSIs. We describe the methodology used to verify the video signal processing algorithm and that of the physical design
Keywords
video coding; Hi-Vision MUSE decoder; Japanese HDTV; codec; consumer-use video signal processing; design methodologies; digital VCRs; input video data; logic designs; verification time; video signal processing algorithm; Algorithm design and analysis; Codecs; Decoding; Design methodology; HDTV; Logic design; Signal design; Signal processing algorithms; Video recording; Video signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference Proceedings 1996, 33rd
Conference_Location
Las Vegas, NV
ISSN
0738-100X
Print_ISBN
0-7803-3294-6
Type
conf
DOI
10.1109/DAC.1996.545627
Filename
545627
Link To Document