Design methodology for analog high frequency ICs

Author

Miyahara, Yasunori ; Oumi, Yoshitomo ; Moriyama, Seij Iro

Author_Institution

Multi Media Eng. Lab., Toshiba Corp., Yokohama, Japan

fYear

1996

fDate

3-7 Jun, 1996

Firstpage

503

Lastpage

508

Abstract

This paper presents a methodology suited for high frequency analog IC design. The use of a top-down method with AHDL for circuit designers is proposed. In order to accelerate the re-use of circuits that were previously designed and validated in other ICs, the authors developed a system that eases the re-use in the top-down design environment. Moreover, a model parameter generation technique for bipolar transistors has been developed and its usefulness has been shown for accurate simulation of high frequency analog ICs

Keywords

UHF integrated circuits; analogue processing circuits; bipolar analogue integrated circuits; cable television; circuit analysis computing; consumer electronics; hardware description languages; integrated circuit design; television receivers; tuning; AHDL; CATV receiver tuner system; bipolar transistors; circuit reuse; design methodology; high frequency analog integrated circuits; model parameter generation technique; top-down design environment; top-down method; Analog integrated circuits; Circuit synthesis; Design methodology; Digital integrated circuits; Frequency; Hardware design languages; Integrated circuit layout; Integrated circuit synthesis; Permission; Signal processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference Proceedings 1996, 33rd

Conference_Location

Las Vegas, NV

ISSN

0738-100X

Print_ISBN

0-7803-3294-6

Type

conf

DOI

10.1109/DAC.1996.545628

Filename

545628