An All-MOS High Linearity Voltage-to-Frequency Converter Chip with 520 KHz/V Sensitivity

Author

Wang, Chua-Chin ; Lee, Tzung-Je ; Li, Chi-Chen ; Hu, Ron

Author_Institution

Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung

fYear

2006

fDate

4-7 Dec. 2006

Firstpage

267

Lastpage

270

Abstract

An all-MOS linear voltage-to-frequency converter (VFC) chip with 520 KHz/V sensitivity is presented in this paper. This circuit converts an input voltage into frequency by charging and discharging a capacitor. An all-MOS voltage window comparator (VWC) with reduced propagation delay is designed to improve the linearity of traditional VFCs. The propagation delay of the VWC is discussed to resolve the tradeoff between bandwidth and linearity of VFC. The proposed VFC is verified on silicon using TSMC (Taiwan Semiconductor Manufacturing Company) 1P5M 0.25mum process. The measurement results show that the linearity error is less than 1%, and the sensitivity is 520 KHz/V at the input voltage range from 0.1 to 0.8 V

Keywords

MOS integrated circuits; comparators (circuits); voltage-frequency convertors; 0.1 to 0.8 V; 0.25 micron; TSMC; Taiwan Semiconductor Manufacturing Company; all-MOS converter chip; all-MOS voltage window comparator; capacitor charging; capacitor discharging; high linearity converter chip; voltage-to-frequency converter chip; Bandwidth; Capacitors; Circuits; Frequency conversion; Linearity; Manufacturing processes; Propagation delay; Semiconductor device manufacture; Silicon; Voltage; linearity; sensitivity; voltage window comparator; voltage-to-frequency converter;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on

Conference_Location

Singapore

Print_ISBN

1-4244-0387-1

Type

conf

DOI

10.1109/APCCAS.2006.342402

Filename

4145382