DocumentCode
2240930
Title
Enhanced Degree Computationless Modified Euclid´s Algorithm
Author
Park, Jang W. ; Baek, Jae H. ; Sunwoo, Myung H.
Author_Institution
Sch. of Electr. & Comput. Eng., Ajou Univ., Suwon
fYear
2006
fDate
4-7 Dec. 2006
Firstpage
305
Lastpage
308
Abstract
This paper proposes an enhanced degree computationless modified Euclid´s (E-DCME) algorithm for Reed-Solomon decoder. The proposed E-DCME algorithm can reduce the number of multiplexers compared with the existing DCME algorithm. The critical path delay of the proposed E-DCME algorithm requires only TMul + TADD + TMUX while that of the existing DCME algorithm requires TMul + TADD + 2TMUX. In addition the proposed E-DCME algorithm uses 3t basic cells and has the latency of 2t -1 clock cycles for solving the key equation. However, the existing DCME algorithm requires 3t + 2 basic cells and 2t clock cycles for solving the key equation. The gate count of the proposed E-DCME architecture is 17,840. Therefore, the E-DCME architecture can reduce the gate count about 18% compared with the existing DCME architecture
Keywords
Reed-Solomon codes; Reed-Solomon decoder; enhanced degree computationless modified Euclid algorithm; Clocks; Computer architecture; Decoding; Delay; Equations; Error correction; Error correction codes; Hardware; Multiplexing; Reed-Solomon codes; Degree computationless; Modified Euclid´s algorithm; Reed-Solomon;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location
Singapore
Print_ISBN
1-4244-0387-1
Type
conf
DOI
10.1109/APCCAS.2006.342412
Filename
4145392
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