DocumentCode
2242028
Title
Restrict Encoding for Mixed-Mode BIST
Author
Hakmi, Abdul-Wahid ; Holst, Stefan ; Wunderlich, Hans-Joachim ; Schloffel, J. ; Hapke, Friedrich ; Glowatz, Andreas
Author_Institution
Inst. fur Tech. Inf., Univ. Stuttgart, Stuttgart, Germany
fYear
2009
fDate
3-7 May 2009
Firstpage
179
Lastpage
184
Abstract
Programmable mixed-mode BIST schemes combine pseudo-random pattern testing and deterministic test. This paper presents a synthesis technique for a mixed-mode BIST scheme which is able to exploit the regularities of a deterministic test pattern set for minimizing the hardware overhead and memory requirements. The scheme saves more than 50% hardware costs compared with the best schemes known so far while complete programmability is still preserved.
Keywords
built-in self test; encoding; logic testing; encoding; hardware costs; programmable mixed-mode BIST; pseudo-random pattern testing; Built-in self-test; Circuit faults; Circuit testing; Clocks; Costs; Dictionaries; Encoding; Hardware; Shift registers; Very large scale integration; Deterministic BIST;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 2009. VTS '09. 27th IEEE
Conference_Location
Santa Cruz, CA
ISSN
1093-0167
Print_ISBN
978-0-7695-3598-2
Type
conf
DOI
10.1109/VTS.2009.43
Filename
5116630
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