Unified VLSI architecture for photo core transform used in JPEG XR

A unified very large-scale integration (VLSI) architecture with butterflies that can perform photo core transform (PCT) in JPEG XR image compression is presented. The proposed architecture can achieve the unified architecture design, which supports the three elemental operations of PCT, and it has the characteristics of lower hardware cost, shorter critical path, lower power consumption, more efficient hardware utilisation and regular structure for VLSI implementation. Finally, the implementation on Altera field programmable gate array (FPGA) devices validates the effectiveness of the design.