DocumentCode
2242138
Title
STDF Memory Fail Datalog Standard
Author
Khoche, A. ; Katz, J. ; Landini, S. ; Liao, K. ; Agrawal, N. ; Plowman, G. ; Zuo, S. ; Lai, L. ; Rowe, J. ; Zanon, T.
fYear
2009
fDate
3-7 May 2009
Firstpage
209
Lastpage
214
Abstract
Yield learning in modern technologies requires fail data logging from the scan and memory structural tests to gain insight into the failing location inside a chip.Currently there is no standard format to store the fail data in an efficient way. A group of more than 20 companies from ATE, EDA, Semiconductor and Yield Management companies has been working to enhance the Standard Fail Data log Format (STDF) V4 to enable efficient fail data log for scan and memory fails. This paper describes the proposed memory fail datalog format.
Keywords
integrated circuit testing; integrated circuit yield; memory structural tests; scan tests; standard fail data log format; yield learning; Built-in self-test; Communication standards; Electronic design automation and methodology; Failure analysis; Graphics; Memory management; Software standards; Software testing; System testing; Very large scale integration; Datalog; Failure; Memory; STDF; Standard;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Test Symposium, 2009. VTS '09. 27th IEEE
Conference_Location
Santa Cruz, CA
ISSN
1093-0167
Print_ISBN
978-0-7695-3598-2
Type
conf
DOI
10.1109/VTS.2009.29
Filename
5116635
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