Title :
Residue arithmetic circuits using a signed-digit number representation
Author :
Wei, Shugang ; Shimizu, Kensuke
Author_Institution :
Dept. of Comput. Sci., Gunma Univ., Japan
Abstract :
A new concept on residue arithmetic using a radix-2 signed-digit (SD) number representation is presented, by which memoryless residue arithmetic circuits using SD adders can be implemented. For a given modulus m, 2p-1⩽m⩽2p+2p-1-1, in a residue number system (RNS), the modulo m addition is performed by using two p-digit SD adders. Thus, the module m addition time is independent of the word length of operands. When m=2p or m=2 p±1, especially, the module m addition is implemented by only using one SD adder. Moreover, a module m multiplier can be constructed using a binary modulo m SD adder tree, so that the modulo m multiplication can be performed in a time proportional to log2p
Keywords :
CMOS logic circuits; adders; logic design; multiplying circuits; residue number systems; binary modulo SD adder tree; memoryless RNS circuits; modulo addition; multiplier; radix-2 SD number representation; residue arithmetic circuits; signed-digit number representation; Adders; Arithmetic; Circuits; Computer science; Equations;
Conference_Titel :
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location :
Geneva
Print_ISBN :
0-7803-5482-6
DOI :
10.1109/ISCAS.2000.857016