Title :
A controller resynthesis based method for improving datapath testability
Author :
Flottes, M.L. ; Rouzeyre, B. ; Volpe, L.
Author_Institution :
Lab. d´´Inf. de Robotique et de Micro-electron., Univ. des Sci. et Tech. du Languedoc, Montpellier, France
Abstract :
Even if a datapath has been synthesized with testability in view, its testability may strongly decreases once it is connected to its controller. In this paper, we propose controller modifications for restoring the testability of the datapath to a level close to the initial one. Those modifications concern the next state logic as well as the decoder part of the controller. The method is based on the results of a testability analysis of the datapath at RT level and on finite automata theory
Keywords :
circuit CAD; design for testability; digital integrated circuits; high level synthesis; integrated circuit testing; logic testing; RT level; controller modifications; controller resynthesis based method; datapath testability improvement; finite automata theory; testability analysis; Automata; Automatic control; Automatic testing; Data analysis; Decoding; Logic;
Conference_Titel :
Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on
Conference_Location :
Geneva
Print_ISBN :
0-7803-5482-6
DOI :
10.1109/ISCAS.2000.857101
