DocumentCode :
2245406
Title :
Three DFM Challenges: Random Defects, Thickness Variation, and Printability Variation
Author :
Chiang, Charles ; Kawa, Jamil
Author_Institution :
Synopsys, Inc., Mountain View, CA
fYear :
2006
fDate :
4-7 Dec. 2006
Firstpage :
1099
Lastpage :
1102
Abstract :
Since the onset of the 90 nm node the challenges associated with further transistor scaling while maintaining a consistently functional, reliable, and yielding design has increased exponentially. While those challenges carry across the spectrum of the manufacturing stages we believe it is the responsibility and the goal of the EDA industry to deal with those issues as thoroughly and as seamlessly as possible to make those challenges transparent to the designer. In this paper we expose and analyze three major DFM challenges: random defects, metal and oxide thickness (z) variation, and printability (x-y) variation. We also briefly go over the solutions EDA tools are offering for dealing with them. The solutions covered are wire spreading and wire widening for random defects, model based dummy fill for thickness variation, and printability solutions for printability variation
Keywords :
design for manufacture; integrated circuit yield; nanoelectronics; 90 nm; DFM challenges; design for manufacturability; dummy fill; metal thickness variation; oxide thickness variation; printability variation; random defects; transistor scaling; wire spreading; wire widening; Contamination; Copper; Design for manufacture; Electronic design automation and methodology; Lithography; Manufacturing; Optical distortion; Optical sensors; Semiconductor device modeling; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location :
Singapore
Print_ISBN :
1-4244-0387-1
Type :
conf
DOI :
10.1109/APCCAS.2006.342313
Filename :
4145589
Link To Document :
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