A Low-power 4-T SAM Design for OFDM Demodulators in DVB Receiversers

Author

Wang, Chua-Chin ; Sung, Gang-Neng ; Chang, Ming-Kai ; Lee, Ching-Li ; Wu, Cheng-Mu ; Chen, Ju-Ya

Author_Institution

Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung

fYear

2006

fDate

4-7 Dec. 2006

Firstpage

1112

Lastpage

1115

Abstract

This paper describes the design and implementation of a sequential access memory (SAM) in the OFDM demodulator of DVB-T receivers. The SAM decoder is based upon a ring counter to reduce the transistor count as well as the number of transitions per memory access. The SAM cell takes advantage of a negative word-line scheme to minimize the leakage current of the cell access transistors. The power consumption of memory access is then reduced. A 2-Kb SAM is carried out by 0.18 mum 1P6M CMOS process to verify the proposed design. The average power dissipation of the address decoder is 41.97 muW, while the average power dissipation of the overall SAM is 4.11 mW given a 20 MHz clock rate

Keywords

CMOS integrated circuits; OFDM modulation; codecs; demodulators; digital video broadcasting; television receivers; 0.18 micron; 2 kbit; 20 MHz; 4.11 mW; 41.97 muW; CMOS process; DVB-T receivers; OFDM demodulators; SAM decoder; SAM design; cell access transistors; leakage current; negative word-line scheme; power consumption; ring counter; sequential access memory; CMOS process; Clocks; Counting circuits; Decoding; Demodulation; Digital video broadcasting; Energy consumption; Leakage current; OFDM; Power dissipation; 4-T cell; DVB-T; SAM; negative word-line; ring;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on

Conference_Location

Singapore

Print_ISBN

1-4244-0387-1

Type

conf

DOI

10.1109/APCCAS.2006.342316

Filename

4145592