Overview of recent developments in microelectronic packaging

Author

Chen, William T. ; Tseng, Andy

Author_Institution

ASE (U.S.) Inc, Santa Clara, CA, USA

fYear

2001

fDate

2001

Firstpage

15

Lastpage

16

Abstract

This presentation will review recent developments and future challenges in microelectronic packaging. The increase in transistor density per each generation of semiconductor technology results in demands for corresponding increase for packaging interconnection density. In meeting these demands there has been a continuous stream of new innovations and new developments in all aspects of microelectronic packaging: in materials, processing, new designs, reliability and testing, metrology, modeling and simulation

Keywords

ball grid arrays; chip scale packaging; integrated circuit packaging; lead bonding; reviews; soldering; technological forecasting; BGA; CSP; QFN; future challenges; innovations; interface integrity; materials processing; microelectronic packaging; packaging interconnection density; recent developments; reliability; solder bump electromigration; stacked chip package; surface modification; transistor density increase; underbump metallurgy interaction; wafer level packages; wirebond pitch; wireless applications; Application software; Consumer electronics; Electronics industry; Electronics packaging; Industrial electronics; Microelectronics; Semiconductor device packaging; Technological innovation; Transistors; Wafer scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Materials and Packaging, 2001. EMAP 2001. Advances in

Conference_Location

Jeju Island

Print_ISBN

0-7803-7157-7

Type

conf

DOI

10.1109/EMAP.2001.983949

Filename

983949