Title :
Design of Dynamically Assignmentable TAM Width for Testing Core-Based SOCs
Author :
Rau, Jiann-Chyi ; Chen, Chien-Shiun ; Wu, Po-Han
Author_Institution :
Dept. of Electr. Eng., Tamkang Univ., Taipei
Abstract :
Test access mechanism (TAM) and testing schedule for system-on-chip (SOC) are challenging problems. Testing schedule must be effective to minimize testing time, under the constraint of test resources. This paper presents a new method based on generalized rectangle packing, as two-dimensional packing. A core cuts into many pieces and utilizes the design of reconfigurable core wrappers, and is dynamic to change the width of the TAM executing the core test. Therefore, a core can utilize different TAM width to complete test
Keywords :
design for testability; integrated circuit testing; scheduling; system-on-chip; core-based SOC testing; generalized rectangle packing; reconfigurable core wrapper; system-on-chip; test access mechanism; testing schedule; two-dimensional packing; Design engineering; Design for testability; Dynamic scheduling; Hardware; Multiplexing; Pins; Registers; System testing; System-on-a-chip; Time factors; SOC Testing; TAM; Testing Scheduling;
Conference_Titel :
Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
Conference_Location :
Singapore
Print_ISBN :
1-4244-0387-1
DOI :
10.1109/APCCAS.2006.342462
