A Compact Equivalent Circuit Model of HVLDMOS and Application in HIVC Design

In this paper, a novel equivalent circuit of high voltage LDMOS is presented, which can be embedded into SPICE and applied in high voltage integrated circuits design. Compared with the conventional circuit models of LDMOS, this model does not divide the on-state region of LDMOS into a linear region and a saturation region. Consequently, the formulas for the circuit model contain fewer parameters easily extracted. This paper first creates an I-V equation which is not only available in the on-state region but also suitable to the sub-threshold region based on numerical simulation, and then we obtain a very simple equivalent circuit. The method of parameters extraction in the model is also offered in details. In the end we give an application of designing a CMOS inverter and verify it by MEDICI