• DocumentCode
    2247707
  • Title

    Low Complexity Architecture for Multiplicative Inversion in GF(2m)

  • Author

    Jing, Ming-Haw ; Chen, Jian-Hong ; Chen, Zih-Heng ; Chen, Yan-Haw

  • Author_Institution
    Dept. of Inf. Eng., I-Shou Univ.
  • fYear
    2006
  • fDate
    4-7 Dec. 2006
  • Firstpage
    1492
  • Lastpage
    1495
  • Abstract
    The multiplicative inversion in finite field is much more complex than all field arithmetic operations. In this paper, a design of a simpler inversion module with lower complexity in GF(2m) using standard basis is proposed. It has the major improvement comparing with the design proposed by Wang et al. and Dinh et al. The implementations of those algorithms are examined in detail using 0.18-mum CMOS technology. The proposed method results in reduction of area requirement by 28% to 48% when m is between 3 and 12
  • Keywords
    CMOS logic circuits; Galois fields; logic design; matrix inversion; multiplying circuits; 0.18 micron; CMOS technology; area reduction; finite field; low complexity architecture; multiplicative inversion; simpler inversion module; standard basis; Arithmetic; CMOS technology; Circuits; Computer architecture; Computer science; Delay effects; Galois fields; Hardware; Polynomials; Power engineering and energy; finite fields; multiplicative inversion; standard basis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2006. APCCAS 2006. IEEE Asia Pacific Conference on
  • Conference_Location
    Singapore
  • Print_ISBN
    1-4244-0387-1
  • Type

    conf

  • DOI
    10.1109/APCCAS.2006.342505
  • Filename
    4145686
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2247707